Blimp Documentation

This is the home for Blimp’s documentation, including installation, the overall framework, and how users can use and/or modify implementations.

Documentation is under construction - stay tuned for blank sections!

Overview

• Design Motivation and Philosophy
• Data Flow in the Processor
• Processor Versions
• Repository Structure
• Build System
• Dependencies
• Further Work

Microarchitectural Units

• Microarchitectural Units
  • Fetch Unit (FU)
  • Decode Issue Unit (DIU)
  • Execute Units (XU)
  • Writeback Commit Unit (WCU)
  • Sequencing Unit (SQU)
  • Squash Unit (SU)

Microarchitectural Details

• Sequence Numbers

Functional Level (FL) Utilities

• Assembler and Disassembler
• Functional-Level Processor

FPGA Implementation

• Memory-Mapped Peripherals
• Memory Network

Demonstrations

• Modifying Blimp
• Colossal Cave Demo